Technical Field
Embodiments described herein generally relate to processors. In particular, embodiments described herein generally relate to caches in processors.
Background Information
In order to improve performance, processors commonly include one or more caches. The caches may represent relatively smaller and faster-access storage than system memory. In addition, the caches may be relatively closer to the cores and/or instruction pipelines than the system memory. The caches may be used to cache or store data that has been brought into the processor from the system memory in order to provide faster subsequent accesses to the data. Representatively, accesses to data in the caches generally take no more than a few processor clock cycles, whereas accesses to data in the system memory may often take from tens to hundreds of clock cycles. When the processor wants to read data from the system memory, the processor may first check to see if a copy of the data is stored in a cache. If the data is found in the cache, then the processor may access the data from the cache, which generally occurs faster than if the data were instead accessed from the system memory. Similarly, when the processor wants to write data to the system memory, the data may often initially first be stored in a cache.
Processors with one or more caches may implement a cache coherency mechanism or protocol to help ensure that data in the caches is coherently managed and written back to memory at appropriate times so that all cores, processors, or other entities in the system coherently view correct and current versions of the data.